ELECINF344/381

Interactive web site of Télécom ParisTech's ELECINF344/ELECINF381 Robotics and Embedded Systems classes (a.k.a. ROSE, 2012 session).

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RoseAce : FPGA and calcul

Now PCB are finished, I work on the FPGA. RAM_controller and RAM_switch blocks are designed and tested. For the good inputs, there are the good outputs in simulation.

Today, I thought about the problem of calculation:  even if the calculations can be done before and then stocked in RAM, I thought that it can be faster to do that on the FPGA. It is the case but, the difference is not quite important and, writing a C program to do it is really easier and faster. S, I wrote this program which create a text files containing the result of pre-calculations. This program is working.

I designed the block which will communicate with the gumstix but, I have some doubts on it and, I didn’t test it.

Now, I have to design the other parts of the FPGA and, to adapt the JRunner program (it is the software we will use to program the FPGA thanks to the gumstix) which was design for a windows system.

Jeremy Sauget

Possibly related posts:

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  3. RoseAce : general architecture
  4. RoseAce : last components choice
  5. New architecture, alimentation and PCB

6 comments to RoseAce : FPGA and calcul

  • Can you remind us which calculations you’re talking about ? (the pixels coordinates?)

  • Sauget Jeremy

    Yes, it is about the pixels’ coordinates : the propeller is describing a circle and, the image is a square. So, we have to determinate at each time which pixel is correspoding at each LED. First, we think about using the Bresenham’s algorithm on the FPGA. But, doing the calculations before on a PC, I just use a cos and sin function …….

  • Where do you store the output of the computation? As a ROM in the FPGA?

    • flx

      If we choose to precalculate the Bresenham result on a computer we will store them in the Gumstix SD card and they will be loaded in the 2 SRAM at the beginning.

      • If you store it in the RAM, you have to retrieve it at runtime. If you make it into the FPGA itself as a decision table, it is similar to a ROM. I don’t know if it will fit though.