ELECINF344/381

Interactive web site of Télécom ParisTech's ELECINF344/ELECINF381 Robotics and Embedded Systems classes (a.k.a. ROSE, 2012 session).

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RoseAce displays a picture from the ram.

After a long debugging phase of our external RAM where we encountered many issues from the simple bad solder to timing issues we finally manage to deal with it.

For the moment we still have only one RAM which has five unavailable pins. So we can store only a eighth of on image but it allows us already to display symmetric pictures like this RoseAce!

You may notice that as we expected the center of the picture is much brighter. So we will have to change the parameters of our LEDs in order to be homogeneous.

 

Sylvain Ract

Roseace is finally turning

After all these painful hours of  electronics debug we finally performed a real breakthrough :)

We succeed to get our position with the encoder wheel and display some leds depending of this position.

 

Edit : Thanks  to the dead body of Ball-E that we have looted we have a functional motor. Coupled to our encoder whell we can display a static image on our rotating leds.

Félix

A snake on a RoseAce.

This video is a little Snake implemented on our device.

To do that, we have stored ten different ranges of pixels in a RAM. (This RAM is a virtual RAM implemented in the FPGA)

Then we displayed alternatively these ranges by reading new addresses in RAM each 0,1s.

Now there are two new step to make; replace the virtual RAM by the real RAM soldered on our PCB and making the pale turn and alternate these ranges no more each period but each position of the blade thanks to the coding wheel.

Sylvain Ract

Double rainbow in the sky

We can finally control the leds one by one with the gumstix through the gpmc and the fpga and play a little bit with our system.

As usual, big thanks to Alexis for the help.

 

Now it’s time for the breakfast and the coffee in the students’ home !

Félix

FPGA : dual clock problem

As our FPGA must communicated with the gumstix using the GPMC bus, 2 clock must be used on the FPGA : GPMC clock for data transfert and, the internal FPGA clock for all the other operations.

To isolate the two clock, we use a dual clock fifo (a altera’s megafunction). Yesterday, Sylvain and I worked all day long trying to make work the fifo (and correcting some problem of simulation … ) in order to turn on LED indicated by the gumstix. It was not a success so, we will keep on working on this problem today.

Jeremy Sauget

RoseAce : LED are lighting !

We worked on the FPGA this last days.

While I was working on controlling the LED driver, Felix and Sylvain worked on the communication with the gumstix. The news are good :

- the communication between gumstix and FPGA is now working. But, the module for the communication must be modified because, in our real system there will be 2 clock : the FPGA clock and the gumstix clock (just for the data transmission). Felix and Sylvain have finished to implement this new architecture but, it must be tested.

- the control of the LED driver is perfect: we can now turn on all the LED on the propeller, choose the color and the intensity

The next steps are controlling the LED thank to the gumstix and, writing in the external RAM.

 

Jeremy Sauget

RoseAce : communication between gumstix and FPGA

The FPGA is now able to do a write access with the GPMC (a read access is not possible for the moment). While Sylvain will work on the reading problem (there are some problems with nOE signal … ), I will test some final modules on the FPGA. All modules are written (with the new calculation flow) and, most of them (but not all for the moment) are tested on simulation. Today, I want to test on the FPGA some modules : ram controller and ram switch modules.

Jeremy Sauget

Writing to the fpga from the gumstix through the gpmc : first success !

Today we succeed in sending a data in the gpmc bus that we have read with the fpga and sent to the ram. In the 16 bits, one was false, so we still have some signal issue but it’s already a good news !

 

 

Félix

RoseAce : FPGA : calculation flow

Although I had finished implementing the calculation block in the FPGA, a discussion with Alexis changed the general architecture of this block. The choosing architecture is the following :

This architecture is simpler. I will now begin to implement it.

 

 

Jeremy Sauget

It’s red :D

Yup ! We finally succeed to program our fpga from the gumstix (through jtag) on our board (big thanks to Alexis).

Félix