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[SpiROSE] Mechanical construction, various tests and FPGA design

This week was full of various little tests and tryouts: Power input, Motors, LEDs,  LED Drivers, etc. It was also a week used for designing the FPGA internal architecture and final adjustments for mechanical construction.

 

Mechanical construction

The mechanical design have been updated due to the lack of some materials in our distributor. The design have been checked and validated back with the mechanics, and the materials have been ordered. The mechanics will start the construction on next week. The motor and his controller have been ordered too.

The updated mechanical design is available here.

FPGA Design

The FPGA architecture have been finished, including clock domains, I/O count, main modules definition, RAM layout, data input specifications, synchronization constraints and drivers control logic. The chosen FPGA (Cyclone III with 40KLE) have been validated to work with this architecture and next week will be used for starting developing on it, to check the timing requirements. The rotative base station schematics can now start.

A note about RAM: last week a basic estimation was done to see if an FPGA could internally store a whole 3D image, but the calculus was erroneous, which leaded us to think that the Cyclone III FPGA was capable of it. The reality is that it can store up to 18 ‘slices’ (we call these micro-blocks), so synchronization is needed.

 

Various experiments

The LED drivers have been soldered on breakout board, as for the LEDs, and some motors we had have been tested. The goal was to validate our choice of components. Due to mechanical construction starting soon, we ordered the final motor and controller just after the tests in order to have it when the construction starts.

 

Now the schematics of the rotative base station are ready to start, and the FPGA code have to be written.

See you next week for more details!

SpiROSE: Architecture review

This week was about choosing the main components and reviewing the architecture of the project. A big snapshot of the project have been done on 2017-11-03, available here.

Review of the architecture

The architecture looks like this:

(Errata, the original one is in the snapshot slides)

On the fixed structure, a 3-phase brushless motor (with reductor) is controlled by a speed controller itself driven by an STM32F7 DevKit we already have, that receives an estimation of the speed via an Hall effect sensor. This DevKit also have a Human Machine interface and communicates to the Single Board Computer (we’re still looking for…) using a WiFi connection. The SBC is in the Rotary part. It communicates to the FPGA (probably using an HDMI to RGB chip, we’re still looking for high bandwidth outputs on the SBCs to avoid that) and a SPI+UART connection let us have a low-speed communication between both. The SBC also has GPIOs for programming the FPGA.

The FPGA receives the RGB stream and splits it to the ~30 8-multiplexed LED drivers that drives the LEDs. The FPGA is managing the multiplexing using another Hall effect sensor.

 

What’s next

The FPGA and the SBC are not fully chosen for now. We are still looking for boards with good output bandwidth that fit our requirements (like, not PCIe because of impedance matching issues, and not GPMC as there is no board available anymore). The other parts are chosen.

 

Next week we have to choose the SBC and FPGA.