Good news today. I completed the testbench connecting the synchronizer and led band controller modules.
This global testbench allowed me to discover and fix new bugs, mainly in the synchonizer module. Everything seems to work as intended now.
The test consists in writing a random frame of data on the led band controller and checking if the simulated driver contains the proper data at the time it should be displayed.
I also tried to change the multiplexing groups, which is an important parameter we will have to set later, and everything still works. I only hope we won’t have too many surprises on the finished product.… Read more
After talking with Tarik, it seems our approach to FPGA/HPS communication was a bit off.
We wanted to use one data bus for writing on the LED band controllers and use GPIOs for the other signals coming from the HPS. It turns out that the GPIOs of the HPS cannot be directly connected to the FPGA, and according to Tarik the workaround are a bit sloppy.
So instead we decided to use the second data bus to write on registers in the FPGA, which will create the needed signals. The first bus will stay dedicated to the DMA module which transfers RAM data to the LED band controllers.… Read more
The implementation of the synchronizer is done. The architecture did not change much from this post.
I did unit tests on the submodules of the synchronizer. However a question came to my mind when it comes to testing the global module. How to test such a module without basically reimplementing it in the testbench ?
For the moment I just took a look at the output and checked that it seemed correct. Here is a look at the little music it produces:
Next, we will have to test if the sync and led band controller modules play nice with each other.
It must indeed control the timing of data sent on all led band controllers. Basically, we need two state machines: one for the function control, the other for the grayscale data. I started to implement the GS state machine today, but this will need extensive testing.
Furthermore, we need to generate the essential SCLK and GCLK signals (see the led driver description), this is done using two clock dividers. I implemented this module, but the division factors are still to be discussed.… Read more
I implemented the new version of the led band controller by following the new architecture explained in this post. This version is simpler than the previous one. With the new version, a huge part of the computing is inside the Synchronisation module.
Small problem with the angle
We split a turn into 128 parts. However, we have 20 PCBs and 20 doesn’t divide 128. 128/20 = 6.4. So we decided to take the nearest integer for the ANGLE_PCB parameter of the Led Band Controller. The worst case is a difference of 0.4. This represents a difference of 1.125° and that represents for the outermost PCB a gap of 1.8mm… Read more