To map our led bands in the memory of the HPS, we use Intel Platform Designer (aka Qsys).
For the moment, I am trying to get one led band controller to work on CyL3D.
As you can see, the module hps io is also a register mapped in memory in which the HPS can write bits to communicate with the module.
After having tested the implementation of the Led Band Controller. I decided to create an IP on QSys. However, we had some problems with that.
The first problem is a consequence of the use of local parameters. Every interface signals which depend on a local parameter have a length of -1 like angle for instance:
parameter NB_ANGLES = 128;
localparam ANGLE_WIDTH = $clog2(NB_ANGLES);
input wire [ANGLE_WIDTH - 1:0] angle;So I would like to know if someone knows how to deal with this problem.
This problem is a smaller one and has a way to fix it but it is not very clean.… Read more