Timing with ESP32, conclusion

Today I corrected the test of the ESP32 as I suggested yesterday. I added more ESP32 and I modified the code to emulate a busy CPU situation. I also paid close attention to the regularity of the timing between emission and reception of the UDP packets.
Here is a picture of the setup:

For the question of the stability of the timing between emission and reception, I found out that it is not stable enough. Here we can see that the timing can at least vary between 0,1 and 0,2s which is too much.

However, as shown below, the precision is fairly good for the reception.… Read more

ESP32 Update

I kept preparing the timing test for the ESP32 today. The challenge was to understand how FreeRTOS works, of course, but also to grasp the workflow of the WiFi on the devkitC.

The example I found first was simply about coding a usual UDP server/client pair. However, when I arrived to the actual testing moment, I realized that there was barely any chance of it working as I did not even provide a basic username/password to my program. So I had to discover more about how to setup the actual WiFi connection.

It eventually worked out. However, I am now stuck on a very annoying problem.… Read more

First outline of a time reference

Today, I started to implement the code necessary to test the possibility to use WiFi for time reference between Phyllos as explained in this post. Although we mainly use ChibiOS for our applications, the documentation for ESP32 is in FreeRTOS so the code for this test will also be using FreeRTOS.

The plan for the test is to connect as many devkitC as possible to a main board (here it will be an Olimex E407 programmed with ChibiOS). The main board will be the master over one of the devkitC. When it will start the test, the slave will broadcast an UDP packet.… Read more

IR Update

Today Sibille and I made some additional tests with the IR receptors, like we talked about in this recent post.

We used the AGC2 TSOP4856 receptor, as well as a LTE-R38381S-ZF-U emitter, with the same circuit setup for our previous tests described in this post.

The first thing we tested was whether we could overwhelm the receptor’s AGC by exposing it to an IR burst longer than the maximum burst length, which is 1.8ms for our receptor. 

With bursts of 3ms (on) and 100ms gaps (off), the receptor tended to be 10 or 20ms late in reacting to the end of the burst.… Read more